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    "name": "\"M3.2b : Space to wide Metal3 (length &",
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      "content": "Looking at the rule:\n\n```\n  # Rule M3.2b: Space to wide Metal3 (length & width > 10um) is 0.3\u00b5m\n  logger.info('Executing rule M3.2b')\n  wide_m3 = metal3.not_interacting(metal3.edges.with_length(nil, 10.um))\n  m32b_l1 = metal3.separation(wide_m3, 0.3.um, euclidian)\n  m32b_l1.output('M3.2b', 'M3.2b : Space to wide Metal3 (length & width > 10um) : 0.3\u00b5m')\n  m32b_l1.forget\n  wide_m3.forget\n```",
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      "content": "I understand it as follows:\n\n`wide_m3` is all the m3 shapes that do not have at least one dimension that is in the range [0, 10), which seems to match what the written rule says",
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      "content": "You need to use common sense when interpreting rules. The dimensions are if the shape is filled. a long thin met3 trace going all around and spanning a distance of more than 10u in both X and Y direction is not \"wide metal\".",
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      "content": "Ok, that explains the issue",
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      "content": "`wide_m3 = metal3.sized(-5.um).sized(5.um) & metal3` might work better.",
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      "content": "Maybe even just metal3.sized(-5.um) and then check if there are any shapes with area > 0 ?",
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      "content": "Why ?  wide metal3 is not an error in itself.",
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      "content": "ah, right \ud83d\ude42",
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      "content": "Here's the docs for reference: https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_07_14.html\nBoth the length and width of the metal need to be > 10um.\nCould you open a quick issue in the gf180mcu PDK fork?",
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      "content": "Created issue along with reproducer and also show casing that the proposed fix does indeed seems to behave better ( doesn't flag the non-existent error, but does correctly flag a true error ).\nhttps://github.com/wafer-space/gf180mcu/issues/4",
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          "title": "Wide metal rule false positive \u00b7 Issue #4 \u00b7 wafer-space/gf180mcu",
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          "description": "The current rule to detect wide metal seems to have false positive, especially when you have a thin trace going in a loop for instance. This then causes issue because the wide metal spacing rule is...",
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      "content": "@Leo Moser (mole99) In general should we open issues against your fork or against fossi repo ?",
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      "content": "@urish if you want to locally patch the PDK",
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      "content": "Thx! Hopefully the upstream PDK will be fixed promptly",
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      "timestamp": "2025-11-23T16:52:35.486+00:00",
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      "content": "In this case I asked to open it against the fork, so that I wouldn't forget about it \ud83d\ude05\nBut in general we want to fix all of these issues upstream. I hope to port the majority of the changes after the tapeout to the FOSSi repos.",
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      "content": "I hope tomorrow is soon enough!\nI'd like to check if a stepped `sized` makes a difference here, since large `sized` can be a performance bottleneck.",
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      "content": "With `upstream` do you mean the PDK fork, or the FOSSi one?\nIf this is an issue in Tiny Tapeout user designs, then I'll upstream the patch sooner than after the tapeout.",
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      "content": "FWIW the new rule executed way faster than the old one \ud83d\ude05",
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      "content": "No, it's only an issue for the top level TT integration.",
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      "content": "We're having a weird LVS failure in the user designs though \ud83d\ude05",
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      "content": "Yes, I would think so \ud83d\ude01  But it might be even faster with doing the sizing in smaller steps.",
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      "content": "Yes, I saw Mike's post, but I haven't had a chance to take a closer look at it yet.",
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      "content": "@Leo Moser (mole99) Yeah sorry, forgot to start the full chip DRC last night ... ( takes like 4.5 ~ 5hours \ud83d\ude05 )",
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      "content": "I'll run the mpw precheck action now",
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      "content": "Np. It works for your reproducible and for the default template, so I assume it works for the TT chip as well :)\nIf not just let me know \u270c\ufe0f",
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      "content": "The latest PDK updates are not yet in the precheck. Working on that now.",
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      "content": "@urish New version is tagged: https://github.com/wafer-space/gf180mcu-precheck/releases/tag/1.0.1",
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      "content": "will rerun the action",
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      "content": "second time: https://github.com/TinyTapeout/tinytapeout-gf-0p2/actions/runs/19698997807",
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      "content": "thanks Leo",
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      "content": "Great \ud83e\udd73  Zero area polygons check coming next.",
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      "content": "and if you find any way of speeding this thing up",
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      "content": "that'd be great",
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      "content": "(for comparison, the sky130 precheck takes around 1 hour on this size of chip, and ihp precheck is also around that ballpark)",
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      "content": "Unfortunately, it's not as easy as that :)\nI hope to find the time to identify the biggest bottlenecks and see if they can be fixed. But that won't happen before the tapeout, at least.\n\nThe IHP KLayout DRC is only that fast because they split the rule deck and run N instances in parallel. You could do the same here (and I'll look into it), but the gf180mcu KLayout DRC implementation is much more memory hungry, so with e.g. 64 GB, I can't run many threads in parallel at all.",
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      "content": "Here's a new precheck tag: https://github.com/wafer-space/gf180mcu-precheck/releases/tag/1.2.0",
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      "content": "Yes, we've seen the memory get to about 10-12 GB",
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      "content": "GH actions have a limit of 16 GB RAM IIRC",
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